1. Field of the Invention
The present invention relates generally to methods of marking semiconductor devices and to semiconductor devices so marked. Particularly, the present invention pertains to the use of stereolithographic techniques to mark semiconductor devices and to stereolithographically marked semiconductor devices.
2. State of the Art
Since the first semiconductor devices became commercially available, manufacturers have found it necessary to mark each chip or chip assembly (bare die or packaged die) with the company name, a part or serial number, or other information such as lot number or die location. Conventional marking methods utilize a mechanical device to transfer ink contained in an ink pad to the surface of a roller or stamp. An individual chip is then stamped, and the automated process is repeated for subsequent chips.
Because of its mechanical nature and the drying time associated with ink, an ink stamping process is relatively slow. Moreover, if the mark is accidentally touched prior to complete drying, the mark will smudge. In chip manufacturing processes using such an ink stamping method, the ink marking operation may have to be included at a relatively early stage of production (if the die itself is to be marked) or just after post-encapsulation processing (if the package is to be marked) to allow for drying time without affecting the production rate. Such early marking may result, however, in marking defective chips that never make it completely through the manufacturing and testing process.
Moreover, when the marked chips are packaged, ink stamping presents an additional step in the fabrication and packaging of the chips.
Another problem associated with ink stamping methods is that the quality of ink stamped marks may substantially vary over time. This variation may be dependent upon the quantity of ink applied, ambient temperature and humidity, and/or the condition of the surface of the stamp. In any event, the consistency of a stamped mark may vary widely from chip to chip.
As a result of the deficiencies associated with ink stamping, it has become increasingly popular to use a laser beam to mark the surface of a chip. Unlike ink stamping, laser marking is very fast, requires no curing time, has a consistently high quality, and can take place at the end of the manufacturing process so that only good chips are marked.
Various machines and methods have been developed for marking a chip package with a laser. As illustrated in U.S. Pat. No. 5,357,077 to Tsuruta, U.S. Pat. No. 5,329,090 to Woelki et al., U.S. Pat. No. 4,945,204 to Nakamura et al., U.S. Pat. No. 4,638,144 to Latta, Jr., U.S. Pat. No. 4,585,931 to Duncan et al., and U.S. Pat. No. 4,375,025 to Carlson, a semiconductor device is placed in a position where a laser beam, usually produced by a carbon dioxide, Nd:YAG, or Nd:YLF laser, inscribes various characters or other information on a surface of the semiconductor device. Basically, the laser beam burns the surface of the chip package such that a different reflectivity from the rest of the chip package surface is formed. By holding the packaged chip at a proper angle to a light source, the information inscribed on the chip package surface by the laser can be read. Various materials are known in the art that are laser reactive (e.g., capable of changing color when contacted by a laser beam). As described in U.S. Pat. No. 4,861,620 to Azuma et al., U.S. Pat. No. 4,753,863 to Spanjer, and U.S. Pat. No. 4,707,722 to Folk et al., the part or component may be partially comprised of the laser markable material or have a coating of the material on the surface of the part or component to be marked.
Using a laser to mark a chip is a fast and economical means of marking. There are, however, certain disadvantages associated with state-of-the-art laser marking techniques that merely burn the surface to achieve the desired mark in comparison to ink stamping. For example, ink stamping provides a clearly visible image on the surface of a chip at nearly every angle of incidence to a light source. A mark burned in a surface by a laser, on the other hand, may only be visible at select angles of incidence to a light source. Further, oils or other contaminants deposited on the chip surface subsequent to marking may blur or even obscure the laser mark. Additionally, because the laser actually burns the surface of the work piece, for bare die marking, the associated burning may damage the internal circuitry of the chip directly or by increasing internal die temperature beyond acceptable limits. Moreover, where the manufactured part is not produced of a laser reactive material, laser reactive coatings applied to the surface of a component add expense and may take hours to cure. In addition, when the chip is packaged, as with ink stamping, laser marking requires an additional post-packaging step.
Thus, it would be advantageous to provide a marking technique that combines the speed and precision of laser marking with the contrast and distinctiveness of ink stamping, without any substantial curing or drying time. Moreover, it would be advantageous to develop a method and apparatus for marking the surface of a semiconductor chip that does not harm the circuitry enclosed therein. It would also be advantageous to provide a method for marking semiconductor chips as the chips are being packaged.
In the past decade, a manufacturing technique termed xe2x80x9cstereolithographyxe2x80x9d, also known as xe2x80x9clayered manufacturingxe2x80x9d, has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or xe2x80x9cslicedxe2x80x9d into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and non-metallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semi-solid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously-formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed might be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.
In more recent years, stereolithography has been employed to develop and refine object designs in relatively inexpensive materials, and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques. It has also been recognized in some industries that a stereolithographic object or component may be formed or built around another, pre-existing object or component to create a larger product.
However, to the inventors"" knowledge, stereolithography has yet to be applied to mass production of articles in volumes of thousands or millions, or employed to produce, augment or enhance products including other, pre-existing components in large quantities, where minute component sizes are involved, and where extremely high resolution and a high degree of reproducibility of results is required. In particular, the inventor is not aware of the use of stereolithography to mark bare or packaged semiconductor devices. Furthermore, conventional stereolithography apparatus and methods fail to address the difficulties of precisely locating and orienting a number of pre-existing components for stereolithographic application of material thereto without the use of mechanical alignment techniques or to otherwise assuring precise, repeatable placement of components.
According to one aspect, the present invention includes a method for marking semiconductor devices. In a preferred embodiment of the method, a computer-controlled, 3-D CAD initiated process known as xe2x80x9cstereolithographyxe2x80x9d or xe2x80x9clayered manufacturingxe2x80x9d is used to mark semiconductor devices. When stereolithographic processes are employed, each mark is formed as either a single layer or a series of superimposed, contiguous, mutually adhered layers of material.
The stereolithographic semiconductor device marking method of the present invention preferably includes the use of a machine vision system to locate the semiconductor devices or substrates that are to be marked, as well as the features or other components on or associated with the semiconductor devices or substrates (e.g., contact pads, conductive traces, etc.). The use of a machine vision system directs the alignment of a stereolithography system with each semiconductor device or substrate for material disposition purposes. Accordingly, the semiconductor devices or substrates need not be precisely mechanically aligned with any component of the stereolithography system to practice the stereolithographic embodiment of the method of the present invention.
In a preferred embodiment, the markings to be fabricated upon a semiconductor device component in accordance with the invention are fabricated using precisely focused electromagnetic radiation in the form of an ultraviolet (UV) wavelength laser under control of a computer and responsive to input from a machine vision system, such as a pattern recognition system, to fix or cure selected regions of a layer of a liquid photopolymer material disposed on the semiconductor device or substrate.
The present invention also includes stereolithographically formed semiconductor device markings, as well as semiconductor devices having stereolithographically formed markings thereon. The marking can be fabricated from a material that visibly contrasts with a surface at which the marking appears. The semiconductor devices can be packaged or comprise bare semiconductor dice.
In one embodiment, the semiconductor device includes a stereolithographically fabricated package. The mark, which is formed as the package is being fabricated, is recessed in a surface of the package. In a variation of the recessed mark embodiment of the present invention, a material that contrasts visually with the material of the stereolithographically fabricated package may be disposed in the recesses to enhance the visibility of the markings.
In another embodiment of the invention, which includes an at least partially packaged semiconductor device, the mark protrudes from, or is raised relative to, a surface of the packaging material in a manner similar to engraving. Such a mark can be fabricated following the packaging process and separately therefrom. Accordingly, the mark can be fabricated on the surface of a stereolithographically formed package or on a package that was previously formed by any other known technique. Alternatively, the mark can be formed integrally with a stereolithographically fabricated package.
In yet another embodiment, the marked semiconductor device is a bare semiconductor die or other bare substrate. The stereolithographically formed mark is fabricated directly on a surface of the bare substrate and protrudes therefrom, or is raised relative thereto.
Other features and advantages of the present invention will become apparent to those of skill in the art through consideration of the ensuing description, the accompanying drawings, and the appended claims.